A Novel Approach Toward Algorithm Architecture Co-Optimization for the Application of Adaptive Noise Cancellation for Wireless Communication

Abstract

As FPGA has been in trend for a few decades in prototyping simple to complex DSP systems, some issues are still highlighted in FPGA-based implementations. One issue is the limited resources mounted onboard. Optimization has always remained a choice of developers, either hardware or software-based. Algorithm architecture co-optimization is a domain that incorporates some changes in existing algorithms besides bringing some ways to produce compact architecture. One of the methods in architecture optimization is to use short-word length-based DSP systems that use a sigma-delta modulation (SDM) approach to reduce the actual data word length from multi-bit to single-bit. SDM in the design causes the system to become compact and efficient. This paper produces algorithm architecture co-optimization for the application of adaptive noise cancellers for wireless communication. The algorithm taken is SDM-based Steepest-Descent, and its implementation is compared with the new proposed SDM-based correlation-less design. Both approaches are simulated in MATLAB, and their functional verification is carried out along with comparing some statistical parameters, including SNR, MSE, and PE. Besides, both the designs are translated on Vertex-7 FPGA to verify the less resources consumed by the proposed method. The MATLAB and FPGA-based results indicate that the proposed design may be the best choice for less sensitive applications, like voice or video.